The ATLAS Monitored Drift Tube (MDT) chamber system is designed for
high-precision tracking of charged particles in the magnetic field of
the barrel and end-cap toroids of the ATLAS muon spectrometer. With a
tube diameter of $30\mm$ and a single-tube spatial resolution of
$80\mum$, a resolution on the track segment position of $35\mum$ can
be achieved in a chamber with 6 drift tube layers. The sense wire
positioning accuracy of the MDT chambers required for this purpose is
$20\mum$.  This performance results in a $\pt$ resolution of about
10\% for a $\pt=1\TeV$ muon track.  To achieve this high resolution,
corrections have to be applied e.g.\ for the variation of the magnetic
field along the tube, which is achieved by B-field sensors mounted on
the chambers. The alignment of the chambers along the tracks, crucial
for measuring track sagittas as low as $500\mum$ with 10\% resolution,
is monitored by an optical alignment system that detects
displacements of chambers relative to each other with an accuracy of
the order of $30$--$40\mum$.

The present MDT chambers can be operated up to background counting
rates of $500\Hzcm$ or $300\kHzt$ without compromising the spatial
resolution and the tracking efficiency
\cite{Aleksa:1999ve,Riegler:1999vc,Horvat:2006ks}.  At rates above
$500\Hzcm$, space-charge effects deteriorate the drift-tube spatial
resolution substantially, by more than 50\%. Above rates of $300\kHz$
per tube, the occupancy exceeds 30\% and the track reconstruction
efficiency starts to degrade. After the Phase-I NSW upgrade, during
which the MDT chambers on the innermost endcap wheel will be removed
from the detector, the expected rates at the HL-LHC for all remaining
MDT chambers do not exceed these limits.

\subsection{sMDT chambers}
\label{sec:smdt-summary}

For the ATLAS Phase-II upgrade, the BIS MDT chambers of the inner
layer of the small barrel sectors will be replaced by small-diameter
Monitored Drift Tube (sMDT) chambers with a drift tube diameter of
only $15\mm$, half the diameter of the original MDT tubes, in order to
create space for the new layer of thin-gap RPC chambers in these
sectors.  The sMDT technology has been developed since 2008 in order
to cope with the higher background rates at the HL-LHC. Standard
industrial aluminum tubes are used, with the same $0.4\mm$ wall
thickness as for MDT tubes. Fig.~\ref{fig:tubessum} shows a comparison  
of MDT and sMDT drift tubes.

The sMDT tube and chamber design
(Figure~\ref{fig:endplug_cross_sectionsum}) and construction 
procedures~\cite{sMDTperf1, sMDTprototype} 
have been optimized for mass production, and for providing a very high
mechanical accuracy in the sense wire positioning. A positioning
accuracy of better than $10\mum$ has been achieved (see Fig.~\ref{fig:residualssum}.

\begin{figure}[tb]
\centering
\includegraphics[width=0.65\textwidth]{tubes.pdf}
\caption{Pictures of MDT (left) and sMDT (right) drift tubes.}
\label{fig:tubessum}
\end{figure}

\begin{figure}[tb]
\centering
\includegraphics[angle=-90,width=0.6\textwidth]{sMDT_endplug_cross_section_labels_2.pdf}
\caption{Cross section of an sMDT endplug~\cite{sMDTprototype}. The sense wire position is
  transferred from the spiral-shaped wire locator on the inside of the
  tube to a cylindrical reference surface on the outside by the
  central brass insert of the injection molded plastic endplug. The
  outside reference surface is used for precise positioning of the
  drift tubes during chamber construction.}
\label{fig:endplug_cross_sectionsum}
\end{figure}

\begin{figure}[tb]
\centering
\includegraphics[width=0.80\textwidth]{BMG3_residuals_r.pdf}
\caption{Residuals of the sense wire positions measured at both ends
  of a BMG sMDT chamber with 356 tubes with respect to the nominal
  wire grid. The wire position is determined from the measurement 
  of the external reference surfaces of the endplugs 
  (see Fig.~\ref{fig:endplug_cross_sectionsum}) with a coordinate 
  measuring machine (CMM).
  The width of the distribution includes the CMM accuracy of
  about $2\mum$~\cite{BMGconstr}.}
\label{fig:residualssum}
\end{figure}

\begin{figure}[tb]
\centering
\includegraphics[width=0.70\textwidth]{spectrum.pdf}
\caption{Measured drift time spectra of MDT (green) and sMDT
  tubes (gray), the latter compared to a GARFIELD simulation
  (red line)~\cite{sMDTperf1}}  
\label{fig:spectrumsum}
\end{figure}

\begin{figure}[tb]
\centering
\includegraphics[width=0.80\textwidth]{res_with_TS_new.pdf}

\caption{Spatial
  resolution after time-slewing corrections (TSC) as a function of the
  drift radius for MDT and sMDT drift tubes measured under the same
  operating conditions in the H8 muon beam at CERN without background
  irradiation~\cite{sMDTperf21, sMDTperf22, sMDTperf3}.  As expected, the results
  for 15 and $30\mm$ diameter tubes are in good agreement for drift
  radii below $7.5\mm$.}
\label{fig:resolrsum}
\end{figure}

The sMDT chambers are operated in ATLAS with the same gas
mixture, gas pressure, and gas gain as the MDT chambers. Their high
voltage is reduced with respect to MDT chambers from $3080\V$ to $2730\V$. 
Typical drift time spectra of MDT and sMDT
tubes are shown in Fig.~\ref{fig:spectrumsum}. The spatial resolution of
sMDT tubes measured in the H8 muon beam as a function of the drift radius 
without background irradiation is shown in Fig.~\ref{fig:resolrsum} 
in comparison with corresponding measurements for MDT tubes. 
The maximum drift time of sMDT tubes is only $175\ns$ in contrast to 
about $720\ns$ for MDT tubes, and 
the sMDT cross section exposed to the 
radiation is half the size of that of an MDT. Altogether, this results 
in an about 8 times lower occupancy. 

The performance of MDT and sMDT chambers has been extensively studied
at the CERN Gamma Irradiation Facility (GIF) using the existing ATLAS
MDT readout electronics with bipolar shaping~\cite{sMDTperf1,
MDTperf01, MDTperf02, sMDTperf21, sMDTperf22}.  The new MDT and sMDT
amplifier-shaper-discriminator (ASD) chips for Phase II will have the
same specifications as those used in the present system.  An about 10
times higher rate capability than the one of the MDT chambers has been
demonstrated for sMDT chambers. No aging has been found up to an
accumulated charge on the sense wire of $9\Ccm$, which corresponds to
15 times the requirement for the ATLAS MDT chambers for 10 years of
operation at the LHC design luminosity~\cite{sMDTperf3, aging}.  A
full-scale sMDT prototype chamber of trapezoidal shape has been
constructed and tested in the H8 muon beam and in the Gamma
Irradiation Facility (GIF) at CERN in 2010~\cite{sMDTprototype}. The
chamber has been operated in the ATLAS cavern in 2012.  In 2014, two
BME sMDT chambers~\cite{BMEproposal, BMEnote, BMEop} have been
installed in the elevator regions of the barrel in sector 13,
sandwiched between two new thin-gap RPC chambers (doublets) each, and
they are in operation since the start of LHC Run 2. In January 2017,
12 BMG sMDT chambers~\cite{BMGconstr, BMGnote} have been installed in
the detector feet in sectors 12 and 14 of the
barrel~\cite{BMGproposal, BMGproduction}.

\begin{figure}[tb]
\centering
\includegraphics[width=0.8\textwidth,angle=180]{BIS78_design.pdf}
\caption{A BIS78 sMDT chamber, with barrel alignment sensors mounted
  on platforms on the top multilayer, and with the
  integrated BIS7 and BIS8 RPC chambers (in red) below.}
\label{fig:BIS78_3Dsum} 
\end{figure}

The challenges for the mechanical design of the BIS sMDT chambers are
the small available space that needs to be shared with the new RPC
chambers, and minimizing the gravitational deformations of the thin
chambers with minimal space available for support structures.  The RPC
chambers are mounted on their own support frame and will be installed
on the existing rails in the BIS layer independent of the sMDTs, in
order to prevent distorting the BIS sMDT chambers. 96 new BIS1-6 sMDT and
RPC chambers will be installed in LS3 replacing the current BIS1-6 MDT chambers.

Already during LS2, 16 new BIS78 sMDT chambers integrated with RPC chambers will
be installed at the ends (outermost positions along the beam line, in
the ATLAS-$Z$ coordinate) of the BIS sectors replacing the current BIS7 and BIS8
MDT chambers in order to improve
the trigger efficiency and the rate capability of the chambers in the
transition regions between barrel and endcaps at $1.0<|\eta|<1.3$
~\cite{BIS78proposal, BIS78note}. This Phase-I upgrade serves as a
pilot project for the complete replacement of the BIS1--6 MDT chambers
in LS3 by sMDT+RPC chamber modules that will have a very similar
design. The design~\cite{sMDT_parameterbook} of the BIS78 sMDT
chambers is completed (see Fig.~\ref{fig:BIS78_3Dsum}) and their
construction has started.

%%% END HERE (DUPLICATE OF MDT_ELECTRONICS)
% 
% As the MDT chambers only measure the z-coordinate of the track,
% trigger chamber information has to be used for a determination of the
% "second coordinate", i.e. in the azimuthal $\phi$-direction of the
% coordinate system. The trigger chambers in the muon spectrometer
% measure both coordinates, z and $\phi$, though the accuracy of the
% z-measurement is only of the order of order of 3-6\,cm. Due to the
% necessity to combine the MDT z-measurement with $\phi$-measurement of
% the trigger chambers, the muon spectrometer is built such that each
% MDT correponds to a trigger chamber, covering the same angular range
% in z and $\phi$, seen from the interaction point. In the barrel the
% RPC technology is used for the trigger chambers, while in the end-cap
% the TGC chamber type is better adopted to the trapezoidal geometry.
% 
% Because of the modest spatial resolution of both trigger chamber
% types, the curvature of the track, and thus the $p_T$, can only be
% determined with limited accuracy at the moment of the L1 trigger. This
% severely reduces the selectivity of the muon trigger for high $p_T$
% tracks, which are the decisive signature for many interesting physics
% channels. At a typical $p_T$ of 20\,GeV, the sagitta of the track is
% about 6\,mm, and an effective $p_T$ resolution of several cm leads to
% a large number of triggers with $p_T$ values down to 10\,GeV. While
% this inefficiency of the trigger system to select high-$p_T$ tracks
% was tolerable at the nominal luminosity, this deficiency at the HL-LHC
% with luminosities up to 7 * nominal would be a considerable drawback,
% as efficiency for high-$p_T$ leptons is is a prime requirement for the
% HL-LHC physics program.
% 
% Based on these considerations, a modified readout concept of MDT and
% trigger chambers has been devised. Combining the accuracy of the MDT
% with the fast track recognition of the trigger chambers at an early
% stage of the readout process allows to use the refined $p_T$
% measurement of the MDT at the first trigger level.
% 
% The MDT chambers will thus be used to provide precise muon momentum
% measurement at Level-0, considerably sharpening the $p_T$ threshold of
% the muon trigger.
% 
% For the readout electronics of the MDT, this concept leads to the
% necessity to split the readout path of the data in two separate
% branches, one following the standard route towards permanent storage
% of the data with no particular requirements to latency, and a second
% one, where the data need to arrive at the trigger processor ("Sector
% Logic") with a latency of a few $\mu$-seconds, early enough to be used
% for the refinement of the high-$p_T$ trigger.
% 
% 
% The upgraded MDT electronics thus needs to handle the Level-0 trigger
% rate and latency requirements imposed by the ATLAS TDAQ system for the
% HL-LHC.  In addition, it will also handle some legacy front-end
% mezzanine cards that could not be replaced due to limited access.
% 
% The design of the new MDT trigger and readout system is based on the
% concept of sending all information (precision hits) as quickly as
% possible to the ATLAS counting room in USA15, and implementing the new
% trigger architecture requirements in USA15 using MDT trigger
% processors.  Raw drift signals for 24 MDT tubes are first amplified,
% shaped, and digitized by three Amplifier-Shaper-Discriminator (ASD)
% chips, followed by a Time-to-Digital Converter (TDC) chip mounted on a
% common front-end mezzanine board. The TDC stores the arrival times of
% both leading and trailing edges of the signal, as well as an
% identifier word for the corresponding tube. The data are passed to a
% FIFO to be finally sent to the Chamber Service Module (CSM).  The CSM
% broadcasts the TTC signals to the TDCs, and collects data from up to
% 18 TDCs.  All hits are sent via the CSM optical fibers to the Hit
% Extraction Board (HEB) where the Level-0 pre-trigger matching is
% performed, i.e.\ the matching to a trigger seed from the RPC or TGC
% trigger chambers, thus assigning the MDT hits to the correct bunch
% crossing. The accurate MDT coordinates will be used to improve the
% spatial resolution of track measurement over what the trigger chambers
% (RPC and TGC) can provide. The hit timing information for all
% trigger-matched hits are sent to the MDT trigger processor where the
% segment-finding and track-fitting algorithms are performed, while the
% timing information for all matched hits are also stored and later sent
% to the Front End Link Interface eXchange (FELIX)~\cite{felix} in case
% of a Level-0 Accept. The design can accommodate the re-using of
% existing cables and motherboards between the mezzanine cards and CSM.
% Detailed simulation indicates that the overall latency for the
% upgraded front-end electronics is 2.2 $\mu s$.
% 
% The design of the new ASD started in 2013 and a few prototypes have
% been developed and evaluated.  Studies with the latest prototype
% version indicate that it meets the ASD specifications and has better
% performances in several categories compared to the legacy ASD. The
% chips have been mounted on mezzanine cards and connected to an MDT
% chamber. Studies with cosmic muons and 150 GeV muon test beams have
% been performed.  More details can be found in Sec.~\ref{sec:mdt-asd}
% 
% There are two options for the TDC design, implementing it either in an
% ASIC or FPGA. The R\&D for both options is currently ongoing in
% parallel. The ASIC TDC is considered as the default option, and the
% FPGA TDC as a backup. A demonstrator TDC ASIC has been designed,
% fabricated and tested. The bin size for the time measurement is
% determined to be $780 \pm 40$ ps, and the differential and integral
% non-linearity are found to be less than 40 ps. More details can be
% found in Sect.~\ref{sec:mdt-tdc-asic}. The FPGA TDC performance has
% been demonstrated for Xilinx Kintex-7 and Microsemi IGLOO2. The bin
% size is determined to be $780 \pm 100$ ps, and the linearity is
% confirmed in a range up to 100 $\mu s$. Studies of radiation tolerance
% are ongoing. More details can be found in
% Sect.~\ref{sec:mdt-tdc-fpga}.
% 
% A few mezzanine card prototypes have been developed and tested for
% different purposes. Boards with three new ASDs and one HPTDC, three
% old ASDs and one demonstrator TDC ASIC, three old ASDs and one TDC
% FPGA are available. More details can be found in
% Sect.~\ref{sec:mdt-mezz}.
% 
% In addition to multiplexing the TDC output data, the CSM will also
% distribute configuration information to the mezzanine cards, and pass
% monitoring information from the mezzanines. There are two considered
% systems for the new CSM: an FPGA-based system which is similar to the
% current CSM design, and a system based on the CERN GBT chip set. The
% algorithm for the FPGA CSM has been developed and tested using
% Kintex-7 evaluation boards.  Studies indicate that it can handle the
% input and output data rates with a bit-error-rate that is below
% $10^{-14}$. A $1/3$rd GBT-based demonstrator CSM board has
% successfully shown to be able to pass data between the GBT and an FPGA
% with the GBT coded at potential data rates. A full GBT CSM prototype
% is under development.  More details can be found in
% Sect.~\ref{sec:mdt-csm}.
% 
